About me
Short Bio (More detailed CV may be found here.)
- Current role (More details on my work experience may be found here.)
- Founder and Governing Body member of C. A. evolvIT Ltd.
- Honorary Staff member at the University of Bristol in the Department of Computer Science, working on an RPF funded project in the area of reliability of manycore chips with title “System Validation via Intelligent Collaboration for Reliable Next-Generation Manycore Chips”.
- Education (More details on my education may be found here.)
- PhD degree at the University of Bristol in the Department of Computer Science
- PhD thesis title: “Error Tolerant Techniques for the Improvement of Reliability and Yield in Advanced Technologies”
- Supervisor: Prof. Dhiraj K. Pradhan.
- Financial Support: University of Bristol, Department of Computer Science
- MSc in Advanced Computing “Global computing and Multimedia” University of Bristol, Department of Computer Science
- MSc dissertation title “A Novel Soft Error Tolerant Low Power RAM Architecture”
- Supervisor Prof. Dhiraj K. Pradhan.
- Appeared in the “Proceedings of the 20th Annual Symposium on Integrated Circuits and System Design SBCCI ‘07″ ISBN:978-1-59593-816-9, page(s) 300-305.
- Financial Support: MISYS foundation.
- BSc in Computer Science and Informatics, at the Moscow Power Engineering Institute Technical University (MPEI-TU).
- PhD degree at the University of Bristol in the Department of Computer Science
- My research interests include but are not limited to:
- Computer hardware design
- Fault-Tolerant computer systems
- Software fault tolerance
- Reliability Improvement
- Error Correcting Codes
- Algorithmic based fault tolerance
- Nanotechnology-based designs
I am open to any collaboration requests. Feel free to drop me an email on this behalf. More details about my research work and my my publications list may be found here.
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